This invention relates to an integrated digital-to-analogue (D/A) converter circuit provided with a device for reducing glitches. This type of D/A converter converts control signals having n binary states Bn into analogue signals and comprises n differential pairs Pn of transistors T1n and T2n connected to n current generators which supply currents of a value In weighted according to the binary weights 2.sup.n of the binary states Bn.
It further relates to those applications in which such an integrated converter circuit, especially for handling of pictures, is utilized.
A circuit of this type is described in the publication entitled "Circuit Technique for Ultra Fast D/A Converters" by W. Lusching and R. Petschacher, Esscirc '83, ninth European solid state Circuit Conference, Lausanne, Sept. 21-23 (1983).
There is described in this publication a fast digital-to-analogue converter comprising a device for reducing glitches. A digital signal intended to be converted into an analogue signal is generally presented in the form of a word having n binary states. Thus, each binary state Bn will have a binary weight 2.sup.n. One way of ensuring the digital-to-analogue conversion is consequently to sum up currents, whose values In are weighted according to the binary weight 2.sup.n of the binary element Bn controlling them.
In order to ensure a fast digital-to-analogue conversion, the circuit described by these authors comprises differential pairs. However, when the configurations of the successive binary words are very different, before a stable signal is obtained, fast variations of the output associated with the switching of the transistors occur. Thus, with a binary word composed of 8 binary elements, this phenomenon is at its maximum when two successive binary words present the configurations 01111111 and then 10000000, or conversely. For this transition, the seven current sources of the binary states of small weights all have to switch simultaneously to the opposite state of the current source of large weight. In an integrated digital-to-analogue converter circuit, the integration techniques lead to a satisfactory rearrangement of the characteristics of the constituent elements of the integrated circuit, more particularly transistors. The latter consequently have very similar characteristics and will switch under very similar conditions. As a result, during the transistions illustrated by the two preceding configurations, the analogue output signal will present transition anomalies designated as glitches, which are characterized by the magnitude of this glitch and by its duration, and hence by its energy.
The enrgy of the glitches is an important parameter of a digital-to-analogue converter circuit, the more so as the converter circuit is faster, for which therefore the level of the analogue output signal has to be rapidly stabilized.
The solution described by W. Lusching and R. Petschacher consists in that a dissymmetry of operation is produced between the two transistors of each differential pair acted upon by each binary element Bn. In fact, by applying an adjustable polarization signal to the base of one of the transistors of this differential pair, an adjustable delay is obtained, which depends upon the sense of variation of the control signal applied to the base of the other transistor of the differential pair.
However, this has disadvantages because first this external polarization signal necessitates a connection to a pin of the circuit and a circuit suitable for realizing this polarization. Now, it is not always possible to have a pin available in high-performance integrated circuits, in which the pins are reserved for the essential and indispensable functions.
On the other hand, this polarization circuit has to be adapted to the temperature variations of the environment in which the digital-to-analogue converter operates and this must necessitate regulations and suitable means taking into account the chosen external polarization mode.